🛠️ Career Summary

Back to Samizo-AITL Portal

Shinichi Samizo is an engineer who has continuously deepened his expertise from
control theory & electromagnetic analysis, through semiconductor device development
and PZT actuators, to the commercialization of PrecisionCore printheads —
evolving from technology → systems → education.

📘 Career Phases

⚡ Phase 0｜Control Design & Electromagnetic Analysis (1994–1997)

💾 Phase 1｜Semiconductor Device Development (1997–2006)

🎛️ Phase 2｜Piezoelectric Materials & Actuators (2007–2012)

🖨️ Phase 3｜PrecisionCore Commercialization & Education (2012–)

🎯 Current Activities

📑 Papers & Research Works

🧩 Historical Case Study: 0.25-µm DRAM & VSRAM

Case study of 0.25 µm DRAM ramp-up and VSRAM mass production.
Analyzes process transfer at Epson’s Sakata Fab, yield-improvement cycles, and defect analysis.
Provides historical insights into process migration and mobile memory development.
📄 DRAM & VSRAM History Paper (PDF)

🧪 Historical Case Study on Ti Silicide (TiSi₂) Reliability Issues

Reliability study of TiSi₂ phase-transition instability at 0.25 µm CMOS.
Examines incomplete C49→C54 transformation, boron absorption, and SRAM yield loss.
Highlights redundancy limitations, etch/RTA countermeasures, and scaling risks.
📄 TiSi₂ Reliability Case Paper (PDF)

🎯 Process-Based Differentiation for Analog CMOS

Process-based approach reducing MOSFET 1/f noise by >50% at 0.18 µm CMOS.
Uses epi substrate, optimized doping, oxide control, H₂ annealing, and geometry tuning.
Demonstrates robustness across temperature/aging, with impact on analog/sensor ICs.
📄 CMOS 0.18 µm Noise Reduction Paper (PDF)

🔋 Low-Cost Integration of 1.8-V FeFET on 0.18-µm CMOS

FeFET integrated into 0.18 µm CMOS with +1 mask and ALD process.
Shows endurance >10⁵ cycles and retention >10 years at 85 °C.
Enables IoT/automotive non-volatile memory for backup and secure key storage.
📄 FeFET CMOS Reliability Paper (PDF)

⚡ On-Chip Magnetic-Laminated Inductor in 0.18-µm CMOS

On-chip laminated inductor with PGS integrated into 0.18 µm CMOS.
Implemented in hybrid Buck–LDO regulator achieving >80% efficiency and wideband response.
Provides competitive alternative to external inductors for IoT and automotive SoCs.
📄 CMOS018 Inductor + LDO Paper (PDF)

🖥️ SystemDK for 3D-IC

Constraint-driven DTCO framework integrating multi-physics into EDA.
Maps FEM thermal/stress and EMI analysis into STA/placement constraints.
Validated on TSV stacks: 87% slack recovery, 11 °C hotspot reduction, 23% eye-opening gain.
📄 SystemDK for 3D-IC Paper (PDF)

💾 LPDDR+FeRAM Chiplet Integration

Hybrid memory combining low-power LPDDR with FeRAM chiplets.
SystemDK co-design enables reduced standby power and instant resume.
Applies to IoT/automotive systems requiring efficient, reliable memory.
📄 LPDDR+FeRAM Integration (PDF)

📘 Educational Tutorial Paper on CFET

Educational overview of Complementary FET (CFET) technology.
Reviews device evolution: Planar → FinFET → GAA → CFET.
Highlights design/manufacturing challenges and teaching applications.
📄 CFET Tutorial Paper (PDF)

🖥️ SystemDK with AITL Paper

Runtime-aware DTCO framework with PID+FSM+LLM control loops.
Real-time compensation of RC delay, thermal, and EMI variability.
Reduces guardbands and enhances sub-2nm reliability.
📄 SystemDK+AITL Main Paper (PDF)

⚙️ Control-Integrated CFET Study

Proof-of-concept for cross-layer CFET control.
Applies PID+FSM+LLM for delay and thermal compensation in nanoscale nodes.
Demonstrates dynamic reliability improvement in sub-2nm ICs.
📄 CFET Control Main Paper (PDF)

🤖 Humanoid Control Architecture Research

Control framework integrating LLM, FSM, PID, and state-space methods.
Validated via cross-node SoC and SystemDK co-design.
Supports next-generation humanoid robots with adaptive control.
📄 Humanoid TCST Paper (PDF)

🚀 AITL on Space

Adaptive Intelligent Triple-Layer (AITL) control with Tri-NVM hierarchy.
Combines H∞ control, FSM, and AI re-design on 22 nm FDSOI SoC.
Enables long-duration spacecraft autonomy and reliability.
📄 AITL on Space Main Paper (PDF)

✈️ SkyEdge High-Altitude Drone Platform

Reference design for secure high-altitude UAV with H∞ control.
Features sensor fusion, variable-pitch rotor, PQC security, and FSM/LLM control.
Ensures robust performance and reliable operation up to 10 km.
📄 SkyEdge Drone Paper (PDF)

🧮 Post-CFET Device Architectures

Comprehensive survey of post-CFET device architectures (2030–2045).
Compares 2D FETs, monolithic 3D, spintronics, and quantum devices.
Provides roadmap on materials, integration, reliability, and EDA/PDK needs.
📄 Post-CFET Main Paper (PDF)

🖨️ Inkjet Tutorial Paper

Comprehensive tutorial on inkjet principles, materials, and applications.
Covers actuation modes, droplet physics, ink chemistry, system/device design, and analysis.
Outlines future directions: Pb-free piezoelectrics, low-voltage actuation, and bio-integration.
📄 Inkjet Tutorial Paper (PDF)

🌊 ScAlN MEMS Ultrasonic Sensor Study

Pb-free ScAlN MEMS integrated with 65 nm SiGe CMOS via SiP.
Demonstrates eco-friendly, high-sensitivity ultrasonic MEMS arrays.
Targets next-generation medical imaging and non-destructive sensing.
📄 ScAlN Ultrasonic Paper (PDF)

🖨️ KNN Bio-Inkjet Printing Study

Bio-Inkjet system using Pb-free KNN actuators under ±50 V drive.
Achieves picoliter-scale droplet generation for biological samples.
Enables safe, sustainable bio-printing of cells and proteins.
📄 Bio-Inkjet Paper (PDF)

⚙️ SystemDK Inkjet Framework

Design support framework for industrial piezoelectric inkjet systems.
Unifies electrical, mechanical, and fluidic domains into a System Design Kit (SystemDK).
Improves droplet control accuracy, shortens design cycles, and accelerates prototyping.
📄 SystemDK Inkjet Paper (PDF)

⚠️ Note
The process information described here is based on conceptual models for educational purposes
and is not related to actual manufacturing flows or confidential data.