π OpenLane Guide β Repository Index
This repository must be read in order.
β οΈ It is intentionally strict.
If you jump around, you will recreate the exact failures this guide exists to prevent.
π Links
| Language | GitHub Pages π | GitHub π» |
|---|---|---|
| EN English |  |
 |
𧱠Phase 1 β Environment Survival (Mandatory)
Goal:
Build an OpenLane environment that does not break,
can be reproduced, and can be restored after failure.
| Step | Document | Purpose |
|---|---|---|
| 01 | 01_WSL_Docker_Setup.md | π§ WSL2 + Docker Desktop setup for stability and export/import survivability |
| 02 | 02_OpenLane1_Setup.md | π§ Install and freeze OpenLane1 (Makefile-based, production flow) |
| 03 | 03_OpenLane2_Setup.md | π§ͺ OpenLane2 for evaluation only β strict isolation |
| 04 | 04_PDK_Setup.md | 𧬠PDK is an asset β pin version, build once, never casually rebuild |
| 05 | 05_Verification_Test.md | β Smoke tests proving toolchain, PDK, and environment correctness |
| 06 | 06_Migration_WSL_Export.md | β»οΈ Disaster recovery via WSL export/import |
| 07 | 07_Troubleshooting.md | π§― Failure prevention checklist (not a fix-it guide) |
π§ Phase 2 β Physical Design Reality
Goal:
Understand where RTL assumptions collapse into physical constraints.
| Step | Document | Focus |
|---|---|---|
| 08 | 08_Placement.md | π Placement fundamentals: density, legalization, convergence |
| 09 | 09_CTS.md | β± Clock Tree Synthesis: skew, insertion delay |
| 10 | 10_Routing.md | 𧡠Global & detailed routing, congestion, DRC pressure |
| 11 | 11_STA.md | π STA: WNS/TNS, setup/hold, uncertainty |
| 12 | 12_GLS.md | π Gate-level simulation without SDF β limits and blind spots |
| 13 | 13_SDF_GLS.md | β³ SDF-annotated GLS β timing becomes behavior |
π Phase 3 β Integration and Timing Truth
Goal:
Align tool output, timing analysis, and physical reality.
| Step | Document | Insight |
|---|---|---|
| 14 | 14_OpenROAD_STA.md | π§ Using OpenROAD + STA without dead ends |
| 15 | 15_Routing_and_Congestion.md | π¦ Congestion analysis and routing strategy |
| 16 | 16_GLS_and_SDF.md | π RTL vs GLS vs SDF-GLS β what βmatchesβ means |
| 17 | 17_Magic_KLayout_Reality_Check.md | πͺ What layout viewers show β and hide |
| 18 | 18_STA_Reality_and_Timing_Closure.md | 𧩠Timing closure mindset and rollback discipline |
| 19 | 19_GLS_SDF_Timing.md | π Timing failure signatures visible only in waveforms |
| 20 | 20_Environment_Failure_Model.md | π₯ Why OpenLane environments collapse |
| 21 | 21_Final_Rules_of_Survival.md | π‘ Non-negotiable survival rules |
π Appendices β Hard-Earned Knowledge
Real failures. Real scars. No theory.
- π APPENDIX_GLS_Failure_Patterns.md
- π APPENDIX_PDK_Mismatch_Anatomy.md
- π APPENDIX_OpenLane1_vs_OpenLane2_Separation.md
- π APPENDIX_Classic_OpenLane_Failure.md
- π APPENDIX_Operational_Rules.md
β οΈ Final Warning
This repository is not friendly.
It is not flexible.
It is reliable.
If you want novelty, leave.
If you want OpenLane to stop breaking, stay.
π€ Author
| π Item | Details |
|---|---|
| Name | Shinichi Samizo |
| Expertise | Semiconductor devices (logic, memory, high-voltage mixed-signal) Thin-film piezo actuators for inkjet systems Printhead productization, BOM management, ISO training |
| GitHub |  |
π License
| π Item | License | Description |
|---|---|---|
| Source Code | MIT License | Free to use, modify, and redistribute |
| Text Materials | CC BY 4.0 or CC BY-SA 4.0 | Attribution required; share-alike applies for BY-SA |
| Figures & Diagrams | CC BY-NC 4.0 | Non-commercial use only |
| External References | Follow the original license | Cite the original source properly |
π¬ Feedback
Suggestions, improvements, and discussions are welcome via GitHub Discussions.
