🎮 AITL Control Playground (PID × FSM Runtime)

🚀 This playground provides an interactive exploration of runtime control behavior
based on the PID × FSM core of the AITL architecture.

🧪 This page is intentionally focused on runtime execution and supervision only.
🧠 Adaptive learning, design intelligence, or online optimization are not implemented here.

🔍 Scope and Assumptions

⚙️ System Model

🏭 Plant: 1st-order lag system
🎛 Controller (runtime): Discrete-time PID controller
🧭 Supervisor (runtime): FSM with explicit operating modes

🔄 FSM Modes

🎯 TRACK — Reference tracking mode
✋ HOLD — State holding mode
🕹 MANUAL — Manual intervention mode

🏗 Architectural Scope Note

This playground demonstrates only the runtime layer of AITL
(PID × FSM).

📝 Any references below to “diagnostics”, “analysis”, or “design comments”
represent offline, design-time interpretation of logged behavior.

🚫 No LLM, NN, or RL component participates in
real-time control on this page.

▶️ How to Start (Recommended Baseline)

Begin with the following initial gains 👇

🎚 Kp = 2.0
♾ Ki = 0.6
⚡ Kd = 0.1

⚠️ Increasing Ki introduces excessive integral action,
which often leads to 📈 oscillation or 💥 instability.

🎓 This behavior is intentional and illustrates a common
real-world control failure mode:
❌ integral windup and over-integration.

MODE Noise

SP (Setpoint):

Manual u (0–1):

Kp:

Ki:

Kd:

Plant parameters (1st-order lag)

τ (Time constant):

Gain K:

dt (simulation step):

PV (Process Value): 
u (Control Output): 
e = SP − PV: 

Design-time diagnostic comments (offline, rule-based example)