20. Baseline OpenLane2 Flow

๐Ÿงช Minimal OpenLane2 Classic Flow Without SRAM


๐ŸŽฏ Purpose

This document records a validated baseline OpenLane2 flow
without any macros.

The purpose of this step is to:

All later macro integration work is built on top of this baseline.


โš ๏ธ Important Note

OpenLane2 vs OpenLane (v1)

OpenLane2 is not CLI-compatible with OpenLane (v1).

Key differences relevant to this document:

This document reflects actual working OpenLane2 behavior,
not v1 conventions or assumptions.


๐Ÿ“‹ Prerequisites

export PDK_ROOT=$HOME/pdks
export PDK=sky130A
source venv/bin/activate

๐Ÿงฑ Baseline Design Choice

A very small and simple design is used intentionally.

Design constraints:

This minimizes noise and isolates pure OpenLane2 flow behavior.


๐Ÿ“ Using the Reference Design (spm)

Instead of creating custom RTL, this baseline uses the
known-good reference design provided with OpenLane2:

openlane2-designs/designs/spm

This avoids RTL-related issues and keeps the focus on the toolchain.

Verified contents:

spm/
โ”œโ”€ config.json
โ”œโ”€ src/
โ”‚  โ”œโ”€ spm.v
โ”‚  โ””โ”€ spm.sdc
โ”œโ”€ pin_order.cfg
โ””โ”€ run_config.json

This design is:


โ–ถ Running the Baseline Flow (Classic)

From the OpenLane2 repository root:

cd ~/openlane2
source venv/bin/activate

Run OpenLane2 using an explicit configuration file:

poetry run openlane \
  --design-dir ../openlane2-designs/designs/spm \
  ../openlane2-designs/designs/spm/config.json

Key points


๐Ÿ”„ Expected Flow Stages

A successful run executes the full Classic flow:

  1. Verilator lint
  2. Synthesis
  3. Floorplanning
  4. Placement
  5. Clock Tree Synthesis (CTS)
  6. Routing
  7. DRC
  8. GDS generation

Successful completion message:

Flow complete.

๐Ÿ“ฆ Expected Outputs

After completion, artifacts are generated under:

openlane2-designs/designs/spm/runs/RUN_*/
โ””โ”€ final/
   โ”œโ”€ gds/
   โ”‚  โ””โ”€ spm.gds
   โ”œโ”€ lef/
   โ”œโ”€ reports/
   โ””โ”€ views/

Primary success indicator


โœ… Verification Checklist

โš ๏ธ Warnings (lint, routing heuristics, etc.) are acceptable at this stage.


๐Ÿง  Observations

This confirms the environment and toolchain are sound.


๐Ÿงญ Role of This Baseline

This baseline serves as:

โš ๏ธ No SRAM-related work should begin until this baseline is reproducible.


โžก Next Step

Proceed to:

โžก docs/30_macro_sram.md
SRAM hard macro integration: blackbox, LEF/GDS, fixed placement


Last updated: Baseline OpenLane2 Classic flow completed and GDS verified โœ