AITL-Controller

Adaptive Intelligent Three-Layer Control Architecture (PID × FSM × LLM)

A lightweight Python implementation combining classical control theory with adaptive AI reasoning.

⚠️ Status: Experimental / 内容検証中
This project is a concept prototype.
Behavior, architecture, and algorithms may change significantly

🌐 Repository & Documentation Links

1. Overview

The AITL architecture consists of three coordinated layers:

• PID Layer: Stabilizes plant behavior based on tracking error.
• FSM Layer: Controls mode switching (NORMAL / DISTURB / TUNE).
• LLM Layer: Adjusts PID gains dynamically during TUNE mode.

2. Architecture Diagram (Mermaid)

3. Components

PID Controller

Handles low-level stabilization with gains (Kp, Ki, Kd).

FSM (Finite State Machine)

Modes:

• NORMAL
• DISTURB
• TUNE

LLM Tuning Layer

Provides adaptive PID gains based on contextual rules.

4. Simulation Results (Demo Plots)

Below are the main demos included in this project.

1. Basic Response (simple_demo.py)

A standard PID response without any supervisory or adaptive action.

2. Disturbance Rejection (disturbance_demo.py)

Demonstrates PID disturbance rejection.
FSM and LLM are not required in this regime.

3. Adaptive PID Tuning (FSM→LLM Activation Demo)

aitl_tuning_demo.py — Highlighting AITL’s core functionality

🔍 What This Demo Shows

This is the main AITL demonstration, where the supervisory and adaptive layers become active.

Step-by-step behavior:

1. PID gains are intentionally weak
   → Slow rise time / insufficient tracking.

2. FSM detects poor performance
   → Error stays large → FSM transitions into TUNE mode.

3. LLM generates new PID gains
   → Kp jumps sharply in the middle plot (adaptive tuning).

4. System output improves immediately
   → Faster convergence and improved stability.

Key takeaway

AITL intervenes only when PID alone is insufficient.
This demonstrates hierarchical adaptive control with minimal disruption to stability.

5. Minimal Usage Example

from aitl_controller import PID, FSM, FakeLLM, Plant, AITL

pid = PID(1.0, 0.2, 0.01)
fsm = FSM()
llm = FakeLLM()

plant = Plant()
ctl = AITL(pid, fsm, llm)

for t in range(1000):
    r = 1.0
    x = plant.x
    u, state = ctl.step(r, x)
    plant.step(u)

6. Repository Layout

src/aitl_controller/   - Core library
demos/                 - Example simulations
tests/                 - Unit tests
assets/                - Stylesheets & plots
docs/                  - GitHub Pages documentation

7. License

MIT License © 2025 Shinichi Samizo

8. Feedback & Contributions

AITL-Controller is currently experimental and under active validation.
Feedback from users, researchers, and developers is highly appreciated.

💬 Discussions

For questions, ideas, or general community topics, please use:

👉 GitHub Discussions

🐞 Issues

For bug reports or reproducible technical problems, please open an Issue:

👉 GitHub Issues

🤝 Contributions

Pull requests are welcome — whether it’s improving documentation,
refining the architecture, proposing new demos, or enhancing the tuning logic.

Thank you for helping improve the AITL architecture!