πŸ“ Directory Structure Overview β€” SemiDevKit

This document describes the recommended directory structure of the SemiDevKit repository
and explains the role of each top-level and module-level directory.

Understanding this structure will help you navigate the toolkit, modify modules safely,
and maintain reproducibility
.


πŸ—‚ 1. Top-Level Layout

The top-level layout of SemiDevKit is organized as follows:

SemiDevKit/
β”‚
β”œβ”€β”€ 1_install.md
β”œβ”€β”€ 2_setup.md
β”œβ”€β”€ 3_usage.md
β”œβ”€β”€ 4_license.md
β”œβ”€β”€ 5_openlane_lite_usage.md
β”œβ”€β”€ 6_troubleshooting.md
β”œβ”€β”€ 7_faq.md
β”œβ”€β”€ 8_directory_structure.md
β”‚
β”œβ”€β”€ tcad_playground/
β”œβ”€β”€ tcad_playground_pzt/
β”œβ”€β”€ bsim4_analyzer_dc/
β”œβ”€β”€ bsim4_analyzer_cv/
β”œβ”€β”€ bsim4_analyzer_dim/
β”œβ”€β”€ bsim4_analyzer_reliability/
β”œβ”€β”€ paramus_physical/
└── openlane_lite/

πŸ“Œ Notes


πŸ§ͺ 2. Module-Level Structure

2.1 TCAD Playground

Lightweight 1D TCAD modeling for MOSFETs, MOSCAPs, and Poisson equation studies.

tcad_playground/
β”œβ”€β”€ fig/                   # Generated figures
β”œβ”€β”€ mosfet_vdid_*.py       # VD–ID simulations
β”œβ”€β”€ mosfet_vgid_*.py       # VG–ID simulations
β”œβ”€β”€ moscap_cv_*.py         # C–V simulations
β”œβ”€β”€ poisson_1d.py          # 1D Poisson solver
└── README.md

2.2 PZT Playground

Exploration of ferroelectric PZT behavior, including hysteresis and material effects.

tcad_playground_pzt/
β”œβ”€β”€ fig/                       # Generated figures
β”œβ”€β”€ pzt_pe_hysteresis_*.py     # P–E loop simulation
β”œβ”€β”€ pzt_pm_surface_3dmap.py    # 3D polarization maps
β”œβ”€β”€ pzt_se_butterfly_1d.py     # Strain–electric field behavior
└── README.md

2.3 BSIM4 Analyzer β€” DC

Automated VG–ID / VD–ID DC sweep analysis using BSIM4 and ngspice.

bsim4_analyzer_dc/
β”œβ”€β”€ models/        # BSIM model cards
β”œβ”€β”€ templates/     # SPICE netlist templates
β”œβ”€β”€ run/           # Simulation scripts
β”œβ”€β”€ plot/          # Plotting utilities
β”œβ”€β”€ results/       # Generated results
└── README.md

2.4 BSIM4 Analyzer β€” CV

Capacitance extraction focusing on physically meaningful Cgg–Vg characteristics.

bsim4_analyzer_cv/
β”œβ”€β”€ models/
β”œβ”€β”€ template_cv.cir
β”œβ”€β”€ run_cv.py
β”œβ”€β”€ plot_cv.py
└── results/

2.5 BSIM4 Analyzer β€” DIM (L / W Sweep)

Analysis of short-channel and geometry-dependent effects.

bsim4_analyzer_dim/
β”œβ”€β”€ models/
β”œβ”€β”€ templates/
β”œβ”€β”€ run/
β”œβ”€β”€ plot/
└── results/

2.6 BSIM4 Reliability Analyzer

Modeling of HCI (NMOS) and NBTI (PMOS) degradation mechanisms.

bsim4_analyzer_reliability/
β”œβ”€β”€ models/
β”œβ”€β”€ templates/
β”œβ”€β”€ run/
β”œβ”€β”€ plot/
└── results/

2.7 Paramus Physical Edition

Generation of BSIM4 model cards from physical parameters.

paramus_physical/
β”œβ”€β”€ modelcard/      # Generated model cards
β”œβ”€β”€ physical/       # Physical parameter definitions
β”œβ”€β”€ presets/        # Technology presets
β”œβ”€β”€ paramus.py
└── README.md

2.8 OpenLane-Lite

Minimal RTL β†’ GDSII digital implementation flow.

openlane_lite/
β”œβ”€β”€ docker/         # Docker wrapper and image
β”œβ”€β”€ scripts/        # Flow execution scripts
β”œβ”€β”€ examples/       # Example designs
└── README.md

πŸ“ 3. Directory Rules and Conventions

To maintain clarity and reproducibility:


🧭 4. Summary

Each module in SemiDevKit:


πŸ“˜ This structure is intentional β€” do not modify it unless you know exactly what you are doing